四位十進(jìn)制數(shù)字頻率計(jì)VHDL，quartus仿真

名稱：四位十進(jìn)制數(shù)字頻率計(jì)VHDL，quartus仿真（代碼在文末付費(fèi)下載）

軟件：Quartus

語言：VHDL

代碼功能：

使用直接測頻法測量信號頻率，測頻范圍為1~9999Hz，具有超量程報(bào)警功能。

演示視頻：

部分代碼展示

LIBRARY?ieee;
???USE?ieee.std_logic_1164.all;
???USE?ieee.std_logic_unsigned.all;
--計(jì)數(shù)器模塊
ENTITY?counter?IS
???PORT?(
??????signal_in??:?IN?STD_LOGIC;--被測信號
??????en?????????:?IN?STD_LOGIC;--1S閘門信號
??????rst????????:?IN?STD_LOGIC;--復(fù)位
??????alarm??????:?OUT?STD_LOGIC;--報(bào)警
??????number?????:?OUT?STD_LOGIC_VECTOR(15?DOWNTO?0)--頻率值
???);
END?counter;
ARCHITECTURE?trans?OF?counter?IS
???SIGNAL?num_0?:?STD_LOGIC_VECTOR(3?DOWNTO?0)?:=?"0000";
???SIGNAL?num_1?:?STD_LOGIC_VECTOR(3?DOWNTO?0)?:=?"0000";
???SIGNAL?num_2?:?STD_LOGIC_VECTOR(3?DOWNTO?0)?:=?"0000";
???SIGNAL?num_3?:?STD_LOGIC_VECTOR(3?DOWNTO?0)?:=?"0000";
BEGIN
???
???number?<=?(num_3?&?num_2?&?num_1?&?num_0);--單位Hz
???
???--計(jì)數(shù),計(jì)數(shù)1s內(nèi)的信號周期數(shù)，計(jì)數(shù)值就是頻率值
???PROCESS?(signal_in,?rst)
???BEGIN
??????IF?(rst?=?'1')?THEN
?????????num_0?<=?"0000";
?????????num_1?<=?"0000";
?????????num_2?<=?"0000";
?????????num_3?<=?"0000";
?????????alarm?<=?'0';
??????ELSIF?(signal_in'EVENT?AND?signal_in?=?'1')?THEN
?????????IF?(en?=?'1')?THEN--計(jì)數(shù)，低位都是9，則高位加1，低位清零，例如加到999，則變?yōu)?000
????????????IF?(num_3?=?"1001"?AND?num_2?=?"1001"?AND?num_1?=?"1001"?AND?num_0?=?"1001")?THEN
???????????????num_0?<=?"0000";
???????????????num_1?<=?"0000";
???????????????num_2?<=?"0000";
???????????????num_3?<=?"0000";
???????????????alarm?<=?'1';--報(bào)警
????????????ELSIF?(num_2?=?"1001"?AND?num_1?=?"1001"?AND?num_0?=?"1001")?THEN
???????????????num_0?<=?"0000";
???????????????num_1?<=?"0000";
???????????????num_2?<=?"0000";
???????????????num_3?<=?num_3?+?"0001";--低位為9，則高位加1，低位清零
???????????????alarm?<=?'0';
????????????ELSIF?(num_1?=?"1001"?AND?num_0?=?"1001")?THEN
???????????????num_0?<=?"0000";
???????????????num_1?<=?"0000";
???????????????num_2?<=?num_2?+?"0001";--低位為9，則高位加1，低位清零
???????????????num_3?<=?num_3;
???????????????alarm?<=?'0';
????????????ELSIF?(num_0?=?"1001")?THEN
???????????????num_0?<=?"0000";
???????????????num_1?<=?num_1?+?"0001";--低位為9，則高位加1，低位清零
???????????????num_2?<=?num_2;
???????????????num_3?<=?num_3;
???????????????alarm?<=?'0';
????????????ELSE
???????????????num_0?<=?num_0?+?"0001";--低位加1
???????????????num_1?<=?num_1;
???????????????num_2?<=?num_2;
???????????????num_3?<=?num_3;
???????????????alarm?<=?'0';
????????????END?IF;
?????????END?IF;
??????END?IF;
???END?PROCESS;
???
???
END?trans;

設(shè)計(jì)文檔(文檔點(diǎn)擊可下載)：

1. 工程文件

2. 程序文件

3. 程序編譯

4. 仿真圖

整體仿真圖

計(jì)數(shù)器模塊

鎖存器模塊

控制模塊

產(chǎn)生閘門信號，清零信號，鎖存信號

數(shù)碼管顯示模塊

點(diǎn)擊鏈接獲取代碼文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=186